{"version":"1.0","width":620,"height":178,"type":"rich","provider_name":"LISTEN","provider_url":"https:\/\/listen.style","url":"https:\/\/listen.style\/p\/zatsudan_72\/4s3yj9v8\/player","title":"\u7b2c\uff11\uff16\uff16\u56de\u76ee\u3001\u300cType-C\u304b\u3089FPGA\u307e\u3067\u30cb\u30c3\u30c1\u306a\u65b9\u5411\u300d\u306a\u96d1\u8ac7","author_name":"\u3044\u304d\u306a\u308a\u30ab\u30ec\u30fc","author_url":"https:\/\/listen.style\/p\/zatsudan_72","html":"<iframe src=\"https:\/\/listen.style\/p\/zatsudan_72\/4s3yj9v8\/player\" title=\"\u7b2c\uff11\uff16\uff16\u56de\u76ee\u3001\u300cType-C\u304b\u3089FPGA\u307e\u3067\u30cb\u30c3\u30c1\u306a\u65b9\u5411\u300d\u306a\u96d1\u8ac7\" scrolling=\"no\" frameborder=\"0\" style=\"width: 100%; height: 178px;\"><a href=\"https:\/\/listen.style\/p\/zatsudan_72\/4s3yj9v8\/player\">\u7b2c\uff11\uff16\uff16\u56de\u76ee\u3001\u300cType-C\u304b\u3089FPGA\u307e\u3067\u30cb\u30c3\u30c1\u306a\u65b9\u5411\u300d\u306a\u96d1\u8ac7<\/a><\/iframe>"}